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M.TECH (Microelectronics & VLSI Engg) National Institute of Technology, Durgapur - 2011 |
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B.TECH (Electronics & Communication Engg) West Bengal University of Technology - 2009 |
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Higher Secondary in Science Stream (PCM) WBCHSE - 2005 |
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Class 10 WBBSE - 2002 |
| Teaching | Research | Industry |
|---|---|---|
| 132 | 36 | 18 |
| Year | Title | Journal | DOI | Link |
|---|---|---|---|---|
| 30-06-2026 | Cellular automata based chaotic image encryption scheme implemented in FPGA | Multimedia Tools and Applications (Springer Nature) | DOI | View |
| 28-04-2025 | Two dimensional chaotic scheme for image encryption in FPGA | Analog Integrated Circuits and Signal Processing (Springer Nature) | DOI | View |
| Year | Title | Conference | DOI | Link |
|---|---|---|---|---|
| 2026 | Secure Chaotic Image Encryption Implemented in FPGA | 2026 International Conference on Computing, Intelligence, and Applications (CIACON) | DOI | View |
| 2026 | Novel FPGA/ASIC Implementation of 3-state TCA for On-chip PRNG | 2026 IEEE 6th International Conference on Emerging VLSI and Semiconductor Technology for AI and Computing Applications (EVST) | DOI | View |
| 2025 | Chaotic Image encryption scheme implemented in FPGA for security enhance | 2024 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) | DOI | View |
| 2025 | Novel Sign-Magnitude Binary to Balanced-Ternary Encoder on Basys3 Artix7 FPGA | 2024 IEEE International Conference of Electron Devices Society Kolkata Chapter (EDKCON) | DOI | View |
| 2023 | One Dimensional Chaotic map Implementation in FPGA board for Image Encryption | 2023 IEEE Devices for Integrated Circuit (DevIC) | DOI | View |
| SL. No. | Committee Name | Duration | Year |
|---|---|---|---|
| 1 | DEPARTMENTAL TRAINING, PLACEMENT AND HIGHER STUDIES COMMITTEE | 25-04-2024 - 24-10-2026 | 2024 |
| 2 | DEPARTMENTAL FEEDBACK ANALYSIS COMMITTEE | 02-04-2024 - 24-10-2026 | 2024 |
| 3 | DEPARTMENTAL SEMINAR WORKSHOP ORGANIZING COMMITTEE | 02-04-2024 - 24-10-2026 | 2024 |